1. Field of the Invention
The present invention is directed to the manufacture of integrated circuit memories. More specifically, but without limitation thereto, the present invention is directed to a method of repairing defective cells in a redundant memory.
2. Description of the Prior Art
Memory circuits are devices that store and recall representations of numeric values in a range of locations each referenced by a specific address. Data is typically stored in a write operation by placing an address on an address bus of the memory circuit, the data to be written on a data bus of the memory circuit and selecting a write operation on a read/write control line of the memory circuit. Data is typically recalled in a read operation by placing an address on an address bus of the memory circuit, selecting a read operation on the read/write control line, and reading the data from the data bus. As the density of memory chips increases, the probability of having defective memory circuits on a chip likewise increases. To improve the percentage of properly functioning memory circuits, or wafer yield, semiconductor manufacturers have used various redundancy techniques. Redundancy means that reserve cells are arranged in spare rows, columns, or blocks on the memory circuit chip. The reserve cells may be used to replace defective cells.